In order to fabricate devices on an integrated circuit, several photoresist masking steps and lithography exposure steps must be performed. To form a patterned layer of material, a layer of material is formed on the integrated circuit. A photoresist material is spun and baked onto a surface of the layer of material. The photoresist is then exposed to light using a mask to protect or expose predetermined areas of the photoresist. The light alters the chemical and/or mechanical properties of the exposed photoresist to create removable photoresist portions and non-removable photoresist portions. A developer chemical is used to subsequently remove the removable photoresist portions and leave the non-removable portions overlying the layer of material to mask portions of the layer of material. The layer of material is then etched to form the patterned layer of material by using the non-removable photoresist portions as a mask.
In many cases, the patterned layer of material is formed over topographical surfaces which have large variations in vertical height and many sloped surfaces. The sloped surfaces and changes in topography can reflect the light that is used to expose portions of the photoresist. This reflection can damage or inadvertently result in the removal of portions of the photoresist that were not meant to be removed. This phenomenon, known as reflective notching, will in many cases result in patterned layers of material that are incorrectly dimensioned or incorrectly electrically open circuited. The incorrect dimensions and electrical disconnections can render an integrated circuit useless.
When the light, having an initial frequency, is reflected, the resulting reflected light usually has a frequency which is phase shifted from the original frequency. Because of the frequency phase shift, a commercially available dye can be applied to an integrated circuit to absorb the reflected light while not absorbing the non-reflected light. If all of the reflected light is absorbed, no reflective notching of photoresist will occur. The frequency phase shift of the reflected light is small and is usually equipment, frequency, and integrated circuit material dependent. In addition, the dye used to absorb reflected light is very expensive. Therefore, the use of a dye to avoid reflective notching has not been used for large scale manufacturing and has not been widely accepted.
Reflective notching has also been avoided through the use of an anti-reflective coating (ARC). The ARC layer is a thin sacrificial layer formed under photoresist to absorb most of the incoming light. Most ARC materials have a small process window and have etch rates which are too low for production applications. In addition, the selectivity of many ARC materials to conductive layers is very low. Therefore, polysilicon or metal lines which underlie an ARC coating may be damaged when the ARC coating is removed.
The use of thin photoresist layers has been proposed to reduce the occurrence of reflective notching. A thin resist layer requires shorter light exposure time and therefore results in less reflected light. The use of thin photoresist layers has resulted in inconsistent results and performance. In addition, thin photoresist layers reduce the amount of time that can be spent etching layers when using the thin photoresist as a mask. The selectivity of photoresist to, for example, oxide and polysilicon during etching of oxide or polysilicon is poor (on the order of 1:2).
Another method which is used to reduce the effects of reflective notching is to use oxygenated etch chemistries to improve etch selectivities to photoresist. The oxygenated chemistries form SiO.sub.2 which deposits onto photoresist sidewalls to reduce the erosion of reflected notched portions of photoresist. This prevention of erosion prevents photoresist reflective notching damage from being transferred to underlying layers. Unfortunately, the SiO.sub.2 sidewall deposition increases the width of critical dimensions (CDs). For example, a line that was intended to be a one micron wide line may become a one and a quarter micron wide line due to sidewall SiO.sub.2 deposition.
Therefore, known methods to reduce the damaging effects of reflective notching are typically expensive, difficult to manufacture, unreliable, and/or not always process compatible.